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Tag: analysis-technique

Not so very long ago, I was given an assignment to perform a forensic analysis on a piece of firmware. It seems that my client’s device had a rather spectacular failure which endangered many lives. The job was critical, but this was new territory for me.

Continue reading “Slicing with Dijkstra” »

As I’ve said before, MC/DC analysis is the bane of Level-A development under DO-178B. It is not well understood, either by developers or by verification engineers. Automated analysis tools will perform the analysis, but that may not occur until verification has begun. Fixes at this stage are far less desirable than avoiding issues in the first place. So how do we ensure that MC/DC issues do not occur in the first place?

Continue reading “Coping with MC/DC” »

Prior to my experience in an avionics environment, I had never heard of MC/DC, now I awake in the night shaking.

Continue reading “MC/DC – The Curse of Level-A Software” »

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